Francisco Jaime

@article{jaime2023,

title = {Strenghtening Privacy and Data Security in Biomedical Microelectromechanical Systems by IoT Communication Security and Protection in Smart Healthcare},

author = {Francisco Jaime, Antonio Mu\~{n}oz, Francisco Rodr\'{i}guez-G\'{o}mez, Antonio Jerez-Calero},

editor = {MDPI},

doi = {10.3390/s23218944},

issn = {14248220},

year  = {2023},

date = {2023-11-03},

urldate = {2023-11-03},

journal = {Sensors},

volume = {23},

issue = {21},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{jaime2017,

title = {Interdisciplinarity in practice: Challenges and benefits for privacy research},

author = {Daniel Le M\'{e}tayer, Mathias Bossuet, Fanny Coudert, Claire Gayrel, Francisco Jaime, Christophe Jouvray, Antonio Kung, Zhendong Ma, Antonio Ma\~{n}a},

editor = {Elsevier},

doi = {10.1016/j.clsr.2017.05.020},

year  = {2017},

date = {2017-12-09},

urldate = {2017-12-09},

journal = {Computer Law \& Security Review},

volume = {33},

issue = {6},

pages = {864-869},

abstract = {The goal of this paper is to draw the lessons learned from a project that involved security systems engineers, computer scientists, lawyers and social scientists. Since one of the goals of the project was to propose actual solutions following the privacy by design approach, its aim was to go beyond multidisciplinarity and build on the variety of expertise available in the consortium to follow a true interdisciplinary approach. We present the challenges before describing the solutions adopted by the project to meet them and the outcomes and benefits of the approach. We conclude with some lessons to be drawn from this experience and recommendations for future interdisciplinary projects.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{jaime2011,

title = {High-Speed Algorithms and Architectures for Range Reduction Computation},

author = {Francisco Jaime, Miguel A. S\'{a}nchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata},

doi = {10.1109/TVLSI.2009.2033932},

issn = {1063-8210},

year  = {2011},

date = {2011-03-01},

urldate = {2011-03-01},

journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},

volume = {19},

number = {3},

pages = {512-516},

abstract = {Range reduction is a crucial step for accuracy in trigonometric functions evaluation. This paper shows and compares a set of algorithms for additive range reduction computation and their corresponding application-specific integrated circuit implementations (ensuring an accuracy of one unit in the last place). A word-serial architecture implementation has been used as a reference for clearer comparisons. Besides, a new table-based pipelined architecture for range reduction has also been proposed.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{jaime2010,

title = {Enhanced Scaling-Free CORDIC},

author = {Francisco Jaime, Miguel A. S\'{a}nchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata},

doi = {10.1109/TCSI.2009.2037391},

issn = {1549-8328},

year  = {2010},

date = {2010-07-01},

urldate = {2010-07-01},

journal = {IEEE Transactions on Circuits and Systems},

volume = {57},

number = {7},

pages = {1654-1662},

abstract = {Coordinate Rotation DIgital Computer (CORDIC) rotator is a well known and widely used algorithm within computers due to its way of carrying out some calculations such as trigonometric functions, among others. A scale factor compensation inherent to the CORDIC algorithm becomes an important drawback when trying to improve its benefits, although some authors have come up with a new scaling-free version, which has been successfully implemented within wireless applications. However, this new CORDIC can still be significantly improved by modifying some of its parts, therefore, this paper shows an enhanced version of the scaling-free CORDIC. These new enhancements have been implemented and tested, obtaining some new architectures which are able to reach a 35% lower latency and a 36% reduction in area and power consumption compared to the original scaling-free architecture.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{jaime2008,

title = {Pipelined Architecture for Additive Range Reduction},

author = {Francisco Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata},

editor = {Springer},

doi = {10.1007/s11265-008-0166-x},

year  = {2008},

date = {2008-03-18},

urldate = {2008-03-18},

journal = {Journal of Signal Processing Systems},

volume = {53},

pages = {103-112},

abstract = {Range reduction is a crucial step for the ac- curacy in trigonometric functions evaluation. A new pipelined architecture to deal with range reduction for floating point representation is presented in this paper. The algorithm is based on a look-up table storing the corresponding powers of 2 mod A. The overall design has been optimized for a modulo equal to 2π, which is the most widely used due to trigonometric functions requirements. We provide an evaluation of different configurations and a full error propagation study which ensures an accuracy of one unit in the last place.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}